SternFA

Stern / Bally MPU, based on FPGA

Hardware version 1.0 and 1.1

Software version x.30 (1.30, 3.30, 4.30)

user manual

ralf@lisy.dev

v1.30 23.10.2026

German version: SternFA_HW1_x_Bedienungsanleitung.html. French version: SternFA_HW1_x_manuel_utilisateur.html. The chapter numbering is the same in all three.

This manual describes the older boards, hardware 1.0 and 1.1, with software x.30. It replaces the manual v1.04.

For hardware 2.0 (PCB v2.00 to v2.02, with the ESP32 socket) there is a manual of its own: SternFA_user_manual.html, in German SternFA_Bedienungsanleitung.html, in French SternFA_manuel_utilisateur.html.

Moving over from manual v1.04? Anti flicker is option Dip5 now, no longer Dip4 (since software x.06, chapter 4.2). And from x.30 on the board also runs without SD card (chapter 5.3).

Table of contents

• Important remark
• 1. Introduction
• 2. Quickstart
• 3. Installation
  • 3.1. What SternFA replaces and what it does not
  • 3.2. What is on the board
• 4. DIP switch settings
  • 4.1. DIP switch S1: game select
  • 4.2. DIP switch S2: options
    • 4.2.1. S2-Dip1 -> zero cross emulator
    • 4.2.2. S2-Dip2 -> save nvram content continuously
    • 4.2.3. S2-Dip3 -> force Bally game
    • 4.2.4. S2-Dip4 -> not used
    • 4.2.5. S2-Dip5 -> anti flicker for games with LEDs
    • 4.2.6. S2-Dip6 -> init nvram
  • 4.3. The DIP switches are read once, at boot
• 5. Boot sequence
  • 5.1. Phase 1: the info display
  • 5.2. Phase 2: SD card read
  • 5.3. Running without SD card (x.30)
  • 5.4. Phase 3: program execution
• 6. Buttons and LEDs on the board
  • 6.1. The three status LEDs
  • 6.2. The buttons
• 7. The SD card
• 8. Game roms in the FPGA flash
• 9. Credits and high scores
• 10. Programming the FPGA
• 11. Board variants
• 12. Version history
• 13. Known limitations
• Appendix A 'game select'
• Appendix B Quick reference

Important remark

By using SternFA it is possible to damage your pinball machine. As this is a private project with NO commercial interest the author accepts no liability for any damage that may arise by using SternFA!

1. Introduction

SternFA uses a (low cost) FPGA which emulates the hardware of a Stern MPU. It rebuilds the MC6800 processor, the two PIA 6821, the 6810 scratchpad ram, the 5101 CMOS ram and the game roms, and it drives the original display, lamp, switch and solenoid connectors of the machine.

Because the same MPU family sits in Bally machines, SternFA runs Stern MPU-100, Stern MPU-200 and Bally -17/-35 games - 238 game numbers are on the SD card image, see Appendix A. Which one runs is set with the eight switches of DIP bank S1.

SternFA is a 100% hobby project. This makes the solution cheap; depending on where you buy your components it is possible to build your Stern replacement MPU for less than 80 €.

What do you need?

• Basic soldering skills (SMD components can be ordered pre-assembled in most shops)
• The possibility to read/write micro SD cards
• A PC with a USB port and a USB Blaster in order to be able to program the FPGA

Three things are worth knowing before you begin:

• All DIP switches are read once, during boot. Changing one while the game runs has no effect - see chapter 4.3.
• The game roms are loaded anew at every power-up - from the SD card, and from x.30 on, without a card, from the configuration flash of the FPGA board (chapter 5.3). If the game is in neither place, there is no game.
• The first digit of the version shown at boot identifies the board - 1, 3 or 4 on the boards of this manual, see chapter 11. If it does not match your board, you have the wrong program in the FPGA.

2. Quickstart

1. Download the latest SD card image and the FPGA program for your board from lisy.dev (chapter 10):
   1. SternFA_1xx for PCB v1.0 with the Cyclone IV board
   2. SternFA_3xx for PCB v1.1 with the Cyclone IV board
   3. SternFA_4xx for PCB v1.1 with the Cyclone 10 board
2. Write the image to a micro SD card and put the card into the board
3. Program the FPGA
4. Configure DIP bank S1 'game select' according to your pinball (Appendix A)
5. Leave DIP bank S2 'options' all OFF for a start
6. Replace your original Stern/Bally MPU with SternFA
7. Switch the game ON
8. Watch the info display for the first few seconds and check that version and game number are what you expect (chapter 5.1)
9. Enjoy

3. Installation

SternFA boards have the same connectors and the same mounting holes as the original Bally/Stern MPUs, so replacing the board can be done in seconds. Switch the machine off, pull the original MPU, put SternFA in, done.

3.1. What SternFA replaces and what it does not

Replaced: the MPU board - processor, ram, roms, both PIAs and the glue logic around them.

Still needed: everything outside the MPU. SternFA drives the original connectors and expects the original boards behind them:

• the lamp driver board (AS-2518-23 or equivalent) with its address decoders,
• the solenoid driver board,
• the display board(s),
• the rectifier / power supply, which also delivers the zero cross signal,
• for MPU-200 games, the Stern SB-300 sound board on connector J5.

SternFA does not rebuild any of these. It behaves towards them exactly as the original MPU did.

3.2. What is on the board

PCB v1.0 and v1.1 differ in one detail you do not see: on v1.1 an external CD4502 generates the display latch strobes, on v1.0 the FPGA does it itself. That is why the two boards need different FPGA programs (chapter 11).

4. DIP switch settings

4.1. DIP switch S1: game select

Here you select which game SternFA should run. This depends on the roms placed on the SD card; Appendix A lists what the current image contains.

The switch pattern is simply the game number in binary, S1 being the lowest bit:

ON = the value is added. Game 101 (MATAHARI) is therefore 1 + 4 + 32 + 64 = S1, S3, S6 and S7 ON, everything else OFF. Appendix A spells this out for every game.

Game numbers 0 to 63 are Stern MPU-200 games and run with the higher processor clock. From 64 upwards SternFA runs the Bally / MPU-100 clock. This is derived from the game number alone (switches S7 and S8), which is why option DIP 3 exists - see 4.2.3.

4.2. DIP switch S2: options

Default setting is all OFF.

Dip4 and Dip5 swapped places in software x.06. Anti flicker used to be Dip4 (manual v1.04) and is Dip5 now. If you move over from an older version with anti flicker in use, move that switch from 4 to 5.

4.2.1. S2-Dip1 -> zero cross emulator

A Bally/Stern MPU needs a 'zero cross' signal in order to work properly; this signal comes from the 12 volt power supply. The existence of the signal is checked during boot.

With Dip1 ON SternFA generates the signal itself (100 Hz, that is a 50 Hz mains), so for testing on the bench you only need a 5 volt supply. Note that the timing is different with emulated zero cross - use it on the bench, not in the machine.

4.2.2. S2-Dip2 -> save nvram content continuously

SternFA uses a FRAM chip to save the nvram content (high scores and extended settings). For bench testing Dip2 can be set to ON, which makes SternFA save the current nvram content continuously.

During normal gameplay the nvram content is saved automatically anyway - triggered by the test switch, the game over relay and the credit button.

4.2.3. S2-Dip3 -> force Bally game

With SternFA you can also run all games that run on BallyFA, by using the BallyFA rom SD image. Set this option to ON in that case - otherwise all games with a number below 64 would run with the higher MPU-200 processor clock.

The Stern SD image provided includes both Stern and Bally games with the correct numbering, so with that image you do not need this option.

4.2.4. S2-Dip4 -> not used

No function on hardware 1.0 and 1.1, leave it OFF. On hardware 2.0 this switch allows the FA-Control test interface to take over the machine.

4.2.5. S2-Dip5 -> anti flicker for games with LEDs

With Dip5 ON SternFA changes the timing of the zero cross signal. Bally games are known for flickering LED replacement lamps; usually each LED needs a resistor in parallel to solve this. With this option the LEDs are flicker free without the additional resistors.

4.2.6. S2-Dip6 -> init nvram

With Dip6 ON SternFA initialises the nvram of the selected game to zero during boot. This is useful if you want to reset all ram content, for example after loading a different game into the same slot.

Set it back to OFF and power cycle afterwards - otherwise the machine will wipe its settings on every start.

4.3. The DIP switches are read once, at boot

Both banks - the eight of S1 and the six of S2 - are read once, in the first moments after power-up, and the values are then held until the next reset. Turning a switch while the machine is running does nothing.

The practical consequence: after changing any switch, power off and power on, or press the reset button S8.

5. Boot sequence

5.1. Phase 1: the info display

Immediately after power-up - or after pressing S8 - SternFA reads both DIP banks and writes the info display to the displays of your machine, before any game code runs. It stays up for the first few blinks of the green LED:

Check player 1 and player 2 at every first start. They tell you whether the right program is in the FPGA and whether the game select switches are set to what you meant.

5.2. Phase 2: SD card read

SternFA reads the rom of the selected game from the SD card. If this fails, the red LED 'SD card error' first blinks a code and then stays lit, and an error digit appears in the status display:

If the read succeeds, the red LED stays dark and no error digit appears.

5.3. Running without SD card (x.30)

New with software x.30. When no SD card answers, SternFA loads the game from the configuration flash (EPCS16) of the FPGA board, under the same game number as on the card. The status display then shows 4.

• The regular release file SternFA_<version>.jic carries no games, for copyright reasons. Without a card the boot then ends with digit 8, and the red LED blinks eight times quickly, then pauses. How the games get into the flash: chapter 8.
• A card that is there but delivers a CRC error (digit 2) is not replaced by the flash - a broken card should stay visible.
• With a card in the slot the card always wins.
• The boot takes a little longer without a card, because SternFA first gives the card its chance.

5.4. Phase 3: program execution

The nvram content of the selected game is fetched from the FRAM into the CMOS ram, and the game code starts running. This is the normal Bally/Stern boot sequence: the green 'Bally' LED blinks a few times, and when the code is up and the interrupts run regularly the green LED goes and stays ON.

From here on, the machine behaves like the original.

6. Buttons and LEDs on the board

6.1. The three status LEDs

6.2. The buttons

7. The SD card

The game roms live on the SD card, and SternFA reads them at every power-up. The card is read raw - there is no file system on it. Write the downloaded image to the card with a raw imaging tool (for example Win32DiskImager, balenaEtcher or dd); simply copying a file onto a formatted card will not work.

Each game occupies a block of 64 KB on the card, and the blocks are laid out in the order of the game numbers of Appendix A. The FPGA calculates the position from the S1 switches alone, which is why the game number and the image version have to match - the game numbers in Appendix A are those of image v0.98.

The image also contains a checksum per game block. That is what error code 2 in 5.2 refers to; it catches a damaged download or a failing card before the game starts behaving strangely.

Any ordinary micro SD card works. Size does not matter - the image is small - but a card that has been in service for years is exactly the kind of part that starts producing error 2.

8. Game roms in the FPGA flash

The FPGA boots from a 2 MByte flash chip (EPCS16) on the FPGA board. The FPGA program takes the first 512 KByte; from address 080000h on there is room for the games. Many games share rom chips, so every 2 KByte rom block is stored only once, with a directory in front that tells for each game number which blocks belong to it. That way all 204 games of SD card image v0.98 fit, in 598 KByte.

The roms are copyrighted, so they cannot be part of the download. You put them there yourself, from an image of your SD card. In the SternFA source tree (github.com/bontango/SternFA) run

.\scripts\build.ps1 <variant> -RomImage <image of the SD card>

with hw1_0_cyclone_IV (PCB v1.0), hw1_1_cyclone_IV or hw1_1_cyclone_10 (PCB v1.1) as variant. Only games with a correct checksum are taken over. This builds the FPGA program and puts it together with the games into one file, variants\<variant>\output_files\sternfa_roms.jic. Program it with the Quartus Programmer instead of the normal .jic.

From then on the board runs without SD card. With a card in the slot the card always wins, so you can still try other roms from a card without touching the flash. Credits and high scores belong to the game number, not to where the rom came from - they stay when you switch between card and flash.

Keep that file to yourself. It contains the game roms and must not be passed on.

9. Credits and high scores

The original MPU keeps its CMOS ram alive with batteries, which is what eventually destroys so many of these boards. SternFA has no battery. Instead it copies the nvram content into the FRAM chip on the board and reads it back at the next start.

You do not have to do anything for this. Saving is triggered automatically by the test switch, the game over relay and the credit button - the same events at which the original board would have settled down. Option Dip2 (4.2.2) forces continuous saving for bench testing, and option Dip6 (4.2.6) wipes the content.

FRAM needs no battery, has no write cycle limit worth thinking about, and does not leak.

10. Programming the FPGA

Everything you need to get the software onto the board is described on my website, and it is kept up to date there:

https://lisy.dev/documentation-01.html

You will find there which programmer software you need, how to install the driver for the USB Blaster, and how to program the FPGA.

The FPGA program itself and the SD card image are in the SternFA software repository:

https://lisy.dev/swrep/SternFA

Make sure you take the version for your board - see chapter 11. With software x.30 these are SternFA_130.jic, SternFA_330.jic and SternFA_430.jic.

The FPGA on this board is configured from a serial configuration device, so the program stays in place after a power cycle. You program it once, not at every start.

11. Board variants

The same design runs on several boards, and the FPGA program is not interchangeable between them - the pin assignment differs, and a wrong program will at best show nothing and at worst drive the wrong pins.

The info display tells you which program is running: the first of the three version digits on player display 1 is the board number. If you loaded the wrong one, the displays will most likely stay dark or show nonsense - check that digit first.

12. Version history

13. Known limitations

• Software x.30 has not been confirmed on hardware 1.x yet - neither the flash fallback nor the normal start from the SD card. If something is wrong, go back to SternFA_106.jic, SternFA_306.jic or SternFA_406.jic and report what you saw.
• The processor clock changed with x.05 on the Cyclone IV boards (1xx and 3xx) to the value the Cyclone 10 board always had. If game speed, sound timing or the display look different from what you are used to, that is the first place to look; SternFA_103.jic / SternFA_304.jic are the last versions with the old clock.
• S9 has no function - see 6.2.

Appendix A 'game select'

Game numbers of SD card image v0.98. ON = switch closed. The pattern is the game number in binary with S1 as the lowest bit, see 4.1.

Appendix B Quick reference

The 14 configuration switches of SternFA

 S1  game select                       S2  options
  1  + 1                                1  zero cross emulator
  2  + 2                                2  save nvram continuously
  3  + 4                                3  force Bally clock
  4  + 8                                4  not used (HW 1.x)
  5  + 16                               5  anti flicker for LEDs (was Dip4 up to x.05)
  6  + 32                               6  init nvram at boot
  7  + 64
  8  + 128                             default: all OFF

 both banks are read ONCE, at boot - after changing anything: power off, power on, or S8

The info display, first seconds after power on

Player 1      4 3 0     version, first digit = board variant (chapter 11)
Player 2   2    1 0 1    game select; leading 2 = Stern MPU-200 clock
Player 3   0 5 0 9 6 3   lisy.dev identifier, fixed
Player 4        1 6      value of the option bank S2 (Dip1=1 ... Dip6=32)
Credit              4    counts down 4, 3, 2, 1, 0

LEDs: red SD card error (dark = good) · yellow zero cross (lit = good) · green Bally (blinks at start, then lit while the game runs)

SD card error digit in the status display: 1 = card not readable · 2 = checksum of the game block wrong · 4 = rom from the configuration flash, no card (no error) · 8 = no card, game not in the flash

Buttons: S8 reset · S33 bookkeeping reset · S9 has no function

FPGA program: SternFA_1xx PCB v1.0 · SternFA_3xx PCB v1.1 Cyclone IV · SternFA_4xx PCB v1.1 Cyclone 10